When data is transferred at high speeds, it is generally in a synchronous format. Additional, to reduce the number of interconnects, the data is sent as serial data. Simple systems precede every data byte with a start bit and add a stop bit to the end of every data byte, just as in asynchronous systems. Based on eight-bit data, this represents a 20% reduction in through-put.
More sophisticated protocols are used to increase the overall through-put of data. To reduce the number of extra bits added to the data stream, the data is placed into packets (blocks) of data. Prior to sending a packet (or packets), a unique start pattern-more commonly called a frame synchronization pattern-is sent. The receiver must wait until the start pattern is detected. Upon detection of the start pattern, the next bit received is part of the data, which is clocked into a serial-to-parallel converter. After a predetermined number of data bits are clocked into the serial-to-parallel converter, the parallel data is clocked out to make room for the next data bit being received. Generally the parallel data is clocked into a FIFO so the receiver is not interrupted every time a data byte is received.
Prior to the present invention, serial frame sync detection and clock generation was accomplished by separate frame detection and clock generation circuits. Such frame detection circuit consisted of a serial-to-parallel converter, a comparator, and an indicator latch. The output of the serial-to-parallel converter was compared to a known frame sync pattern. Upon detection of the frame pattern, the frame detector enabled a clock divider circuit that generated the control signals which clocked the serial-to-parallel converter and loaded the data into the FIFO. Also, when the frame sync pattern was detected the indicator latch was set.
The present invention uses a single circuit approach, which significantly reduces the number of components required to perform frame detection and control signal generation. Another advantage of the present invention is that it can be easily adapted to perform either, or both, of these functions. The present invention can be tailored to work with either continuous or discontinuous (Time Division Multiplexed TDM) types of serial data streams.